FIG. 1 is a block diagram of a conventional electronic game machine 80 and a controller. In the figure CPU 81 (Central Processor Unit) writes data into a W-RAM 83, reads data out of the W-RAM 83 and transmits data to a PPU 84 (Picture Processing Unit), in synchronism with a clock signal and according to program data stored in a ROM 82 (Read Only Memory). The game machine generates a picture image signal which is output by PPU 84 based on image data in V-RAM 85. The CPU 81 also transmits a clock signal to a controller 90A or 90B to directly receive data in synchronism with the clock signal based upon switch actuation by an operator. The CPU 81 outputs data to PPU 84 so as to change the image signal in accordance with the data input from controller 90A or 90B.
The game machine 80 and controllers 90A and 90B are connected by a data line for receiving operating device data from the controllers 90A and 90B and a clock signal line for transmitting a clock signal to the controllers 90A and 90B for synchronizing timing of data transmission from the controller and timing of operation of the CPU 81. The data line is connected directly to the CPU 81 via an interface (not shown). In other words, in the conventional game machine system, data from controllers 90A and 90B is read directly by the CPU 81 which performs image processing at timing based on the clock signal. CPU 81 has to directly read the signals from controllers 90A and 90B, thus increasing the amount of processing by CPU 81. Furthermore, CPU 81 has to read the signal from the controller in synchronism with the clock, so that there needs to be a clock line, in addition to the data line for transmission and reception of data. To this end, there is increase in the number of pins of the connector for connecting between the controller cable and the game machine, raising manufacturing costs. Furthermore, the conventional controllers 90A and 90B each include a plurality of switches and transmission of data to the main-body game machine occurs depending upon whether or not an individual switch is depressed.
As the amount of controller data increases, the amount of time required for the CPU to read controller data also increases. Thus, the CPU has an increases processing burden as the amount of such data increases.
Moreover, conventionally, a clock signal line is required in addition to the data line for connection between a controller and the game machine. Thus, the number of pins of the connector connecting the controller and the game machine is increased, adding to manufacturing costs.
In addition, conventional controllers do not typically permit transmission and reception of data without regard to whether or not an individual switch is depressed. In conventional video game systems, it has been impossible to flexibly utilize a controller in a variety of methods of use by extending its use in various ways after purchasing.